1.__________ converts the programs written in assembly language into machine instructions.

a. Converter

b. Assembler

c. Machine compilerInterpreter

Correct Answer: b

2.Instructions which won’t appear in the object program are called as _____

a. Redundant instructions

b. Assembler Directives

c. Exceptions

d. Comments

Correct Answer: b

3.The utility program used to bring the object code into memory for execution is ______Loader

a. Fetcher

b. Extractor

c. Linker


Correct Answer: d

4.The ultimate goal of a compiler is to ________

a. Reduce the clock cycles for a programming task

b. Reduce the size of the object code

c. Be versatile

d. Be able to detect even the smallest of errors

Correct Answer: a

5.As of 2000, the reference system to find the SPEC rating are built with _____ Processor.


b. Intel Atom SParc 300Mhz

c. ASUS A series 450 Mhz

d. Ultra SPARC -IIi 300M Amd Neutrino seriesHZ

Correct Answer: d

6.The code sent by the device in vectored interrupt is _____ long.

a. upto 16 bits

b. 4-8 bits

c. upto 24 bits

d. upto 32 bits

Correct Answer: b

7.Which table handle stores the addresses of the interrupt handling sub-routines?

a. Symbol link tableNone of the mentioned


c. Interrupt-vector table

d. Vector table

Correct Answer: c

8.The directive used to perform initialization before the execution of the code is ______Dataword

a. Store

b. EQU

c. Dataword

d. Reserve

Correct Answer: c

9.The assembler stores the object code in ______

a. Magnetic disk

b. RAM

c. Cache

d. Main memory

Correct Answer: a

10.To overcome the problems of the assembler in dealing with branching code we use _____

a. Op-Assembler

b. Debugger

c. Interpreter

d. Two-pass assembler

Correct Answer: d

11.The most efficient way of handling parameter passing is by using ______

a. Memory locations

b. None of the mentioned

c. General purpose registers

d. Stacks

Correct Answer: c

12.The order in which the return addresses are generated and used is _________

a. Random

b. Highest priority



Correct Answer: c

13.As of 2000, the reference system to find the performance of a system is _____

a. Ultra SPARC 10



d. None of the mentioned

Correct Answer: a

14.If a processor clock is rated as 1250 million cycles per second, then its clock period is ________

a. 1.6 * 10-9 sec

b. 8 * 10-10 sec

c. 1.9 * 10-10 sec

d. 1.25 * 10-10 sec

Correct Answer: b

15.The device which interacts with the initiator is __________

a. Master

b. Responder

c. Friend

d. Slave

Correct Answer: d

16.Which is fed into the BUS first by the initiator?

a. Data

b. Address, Commands or controls

c. Commands or controls

d. Address

Correct Answer: b

17._____________ signal is used as an acknowledgement signal by the slave in Multiple cycle transfers.

a. Ack signal

b. Master ready signal

c. Slave received signal

d. Slave ready signal

Correct Answer: d

18.The device which starts data transfer is called __________

a. Initiator

b. Distributor

c. Transactor

d. Master

Correct Answer: a

19._____ is/are types of exceptions.

a. Trap

b. All of the mentioned

c. Trap

d. Interrupt

Correct Answer: b

20.The instructions which can be run only supervisor mode are?

a. Exception instructions

b. System instructions

c. Non-privileged instructions

d. Privileged instructions

Correct Answer: d

21.The DMA transfers are performed by a control circuit called as __________

a. Data controller

b. Overlooker

c. DMA controller

d. Device interface

Correct Answer: c

22.The controller is connected to the ____

a. Processor BUS

b. External BUS

c. None of the mentioned

d. System BUS

Correct Answer: d

23.The technique where the controller is given complete access to main memory is __________

a. Cycle stealing

b. Burst mode

c. Memory Con

d. Memory stealing

Correct Answer: b

24.To overcome the conflict over the possession of the BUS we use ______

a. BUS arbitrators

b. Optimizers

c. Multiple BUS structure

d. None of the mentioned

Correct Answer: a

25.The DMA transfer is initiated by _____

a. The process being executed

b. I/O devices

c. OS

d. Processor

Correct Answer: d

26.__________ is the bottleneck, when it comes computer performance.

a. Delay

b. Latency

c. Memory cycle time

d. Memory access time

Correct Answer: c

27.The cells in each column are connected to ______

a. Sense/ Write lineRead line


c. Data line

d. Word line

Correct Answer: a

28.Circuits that can hold their state as long as power is applied is _______

a. Dynamic memory

b. Register

c. Cache

d. Static memory

Correct Answer: d

29.In a 4M-bit chip organisation has a total of 19 external connections.then it has _______ address if 8 data lines are there.

a. 9

b. 8

c. 10

d. 12

Correct Answer: a

30.A 16 X 8 Organisation of memory cells, can store upto _____

a. 128 bits

b. 512 bits

c. 1024 bits

d. 256 bits

Correct Answer: a

31.The contents of the EPROM are erased by ________

a. Exposing the chip to UV rays

b. Overcharging the chip

c. Exposing the chip to IR rays

d. Discharging the Chip

Correct Answer: a

32.The flash memories find application in ______

a. Mainframe systems

b. Super computers

c. Portable devicesDistributed systems


Correct Answer: c

33.The flash memory modules designed to replace the functioning of a hard disk is ______



c. Flash drives


Correct Answer: c

34.The disadvantage of the EPROM chip is _______

a. The low speed of operation

b. The low efficiency

c. The high cost factor

d. The need to remove the chip physically to reprogram it

Correct Answer: d

35.The flash memories find application in ______

a. Mainframe systems

b. Super computers

c. Portable devices

d. Distributed systems

Correct Answer: c

36.To overcome the lag in the operating speeds of the I/O device and the processor we use ___________

a. BUffer spaces

b. Interrupt signals

c. Exceptions

d. Status flags

Correct Answer: d

37.The process wherein the processor constantly checks the status flags is called as ___________

a. Reviewing

b. Echoing

c. Polling

d. Inspection

Correct Answer: c

38.The data is transferred over the RAMBUS as _______

a. Packets

b. Blocks

c. Bits

d. Swing voltages

Correct Answer: d

39.The only draw back of using the early start protocol is _______

a. Complexity of circuit

b. Time delay

c. Latency

d. High miss rate

Correct Answer: a

40.The logic operations are implemented using _______ circuits.

a. Gate

b. Combinatorial

c. Bridge

d. Logical

Correct Answer: b

41.In full adders the sum circuit is implemented using ________

a. And & or gates

b. NAND gate


d. XOR

Correct Answer: d

42.A _______ gate is used to detect the occurrence of an overflow.


b. XOR



Correct Answer: b

43.The multiplier is stored in ______

a. PC Register

b. Cache

c. None of the mentioned

d. Shift register

Correct Answer: d

44.The multiplicand and the control signals are passed through to the n-bit adder via _____

a. Encoder

b. Decoder

c. MUX


Correct Answer: c

45.The bits 1 & 1 are recorded as _______ in bit-pair recording.

a. 1

b. both -1 and 0

c. -1

d. 0

Correct Answer: b

46.CSA stands for?

a. Computer Service Architecture

b. None of the mentioned

c. Computer Speed Addition

d. Carry Save Addition

Correct Answer: c

47.Each computer in a cluster is connected using __________

a. Rj-45

b. STP

c. UTP

d. Coaxial cable

Correct Answer: a

48.In the client server model of the cluster _________ approach is used.

a. Bankers algorithm


c. Load configuration

d. Round robin

Correct Answer: d

49.The most common modes of communication in clusters are ______

a. Message passing interface

b. Message queues

c. Message passing interface and PVm

d. PVm

Correct Answer: c

50.The alternate way of writing the instruction, ADD #5,R1 is ______

a. There is no other way

b. ADDI 5,R1;

c. ADDIME 5,[R1];

d. ADD [5],[R1];

Correct Answer: b