# DIGITAL LOGIC & DESIGN-III

1. According to the property of minterm, how many combination will have value equal to 1 for K input variables?

a. 1

b. 2

c. 3

d. 4

2. According to boolean law: A + 1 = ?

a. 1

b. A

c. 0

d. A’

3. How many AND gates are required to realize Y = CD + EF + G?

a. 5

b. 2

c. 3

d. 4

4. Total number of inputs in a half adder is

a. 3

b. 4

c. 1

d. 2

5. How many types of sequential circuits are?

a. 5

b. 2

c. 3

d. 4

6. How many select lines would be required for an 8-line-to-1-line multiplexer?

a. 8

b. 3

c. 2

d. 4

7. The truth table for an S-R flip-flop has how many VALID entries?

a. 4

b. 2

c. 1

d. 3

8. The NAND gate output will be low if the two inputs are

a. 10

b. o0

c. 11

d. o1

9. There are ______ cells in a 4-variable K-map.

a. 16

b. 12

c. 18

d. 8

10. How many truth table entries are necessary for a four-input circuit?

a. 12

b. 16

c. 4

d. 8

11. Convert the hexadecimal number (1E2)16 to decimal:

a. 482

b. 484

c. 480

d. 483

12. 1’s complement of 1011101 is

a. 100010

b. o101110

c. 1001101

d. 1100101

13. Perform binary addition: 101101 + 011011 = ?

a. 1010100

b. 11010

c. 1001000

d. 101110

14. The decimal equivalent of the octal number (645)8 is

a. 0

b. (501)10

c. 0

d. (450)10

15. Exclusive-OR (XOR) logic gates can be constructed from what other logic gates?

a. 0

b. AND gates, OR gates, and NOT gates

c. 0

d. AND gates and NOT gates

16. Don’t care conditions can be used for simplifying Boolean expressions in

a. 0

b. Registers

c. 0

d. Terms

17. A variable on its own or in its complemented form is known as a

a. 0

b. Sum Term

c. 0

d. Word

18. DeMorgan’s theorem states that

a. 0

b. (A + B)’ = A’ * B

c. 0

d. (AB)’ = A’ + B

19. The largest two digit hexadecimal number is

a. 0

b. (FE)16

c. 0

d. (EF)16

20. In binary number system digits range from?

a. 0

b. 0-1

c. 0

d. 0-8

21. A flip flop stores

a. 0

b. 10 bit of information

c. 0

d. 3 bit of information

22. How many AND, OR and EXOR gates are required for the configuration of full adder?

a. 0

b. 2, 1, 2

c. 0

d. 3,1,2

23. The quantity of double word is

a. 0

b. 4 bits

c. 0

d. 32 bits

24. If A and B are the inputs of a half adder, the sum is given by

a. 0

b. A XOR B

c. 0

d. A OR B

25. In which operation carry is obtained?

a. 0

c. 0

d. Multipication

26. Which input values will cause an AND logic gate to produce a HIGH output?

a. 0

b. At least one input is LOW

c. 0

d. All inputs are HIGH

27. In boolean algebra, the OR operation is performed by which properties?

a. 0

b. All of the Mentioned

c. 0

d. Commutative properties

28. Entries known as _______________ mapping.

a. 0

b. Straigth

c. 0

d. Boolean

29. These logic gates are widely used in _______________ design and therefore are available in IC form.

a. 0

b. Sampling

c. 0

d. Digital

30. The AND function can be used to ___________ and the OR function can be used to

a. 0

b. Detect, invert

c. 0

d. Disable,enable

31. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given

a. 0

b. Value

c. 0

d. Word

32. The basic logic gate whose output is the complement of the input is the _

a. 0

b. XOR gate

c. 0

d. OR gates and NOT gates

33. The sequential circuit is also called

a. 0

c. 0

d. Latch

34. If we use an AND gate to inhibit a signal from passing one of the inputs must be

a. 0

b. LOW

c. 0

d. Inverted

35. If the number of n selected input lines is equal to 2^m then it requires _____ select lines.

a. 0

b. m

c. 2

d. n

36. The instruction used in a program for executing them is stored in the

a. 0

b. Microprocessor

c. 0

d. CPU

37. It should be kept in mind that don’t care terms should be used along with the terms that are present in

a. 0

b. K-Map

c. 0

d. Expressions

38. Any signed negative binary number is recognised by its

a. 0

b. LSB

c. 0

d. Nibble

39. If the decimal number is a fraction then its binary equivalent is obtained by ________ the number continuously by 2.

a. 0

b. Multiplying

c. 0

d. Subtracting

40. Using the transformation method you can realize any POS realization of OR-AND with only.

a. 0

b. NAND

c. 0

d. NOR

41. A single transistor can be used to build which of the following digital logic gates?

a. 0

b. AND gate

c. 0

d. NAND gate

42. The NOR gate output will be high if the two inputs are

a. 0

b. 10

c. 11

d. o0

43. Perform binary subtraction: 101111 – 010101 = ?

a. 0

b. o11001

c. 0

d. 100100

44. 2’s complement of 11001011 is

a. 0

b. o10101111

c. 1001101

d. 1100101

45. The expression Y=(A+B)(B+C)(C+A) shows the _________ operation.

a. 0

b. NAND

c. 0

d. SOP

46. A ROM is defined as

a. 0

c. 0

47. In a multiplexer, the selection of a particular input line is controlled by _

a. 0

b. Selected lines

c. 0

d. Logic gates

48. The logical sum of two or more logical product terms is called

a. 0

b. NAND Operation

c. 0

d. POS

49. The expression Y=AB+BC+AC shows the _________ operation.

a. 0

b. NOR

c. 0

d. POS